硬件设计技术

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硬件设计技术For the past 30 years， the standard VDDfor digital circuits has been 5V. This voltage
level was used because bipolar transistor technology required 5V to allow headroom
for proper operation. However， in the late 1980s， Complimentary Metal Oxide
Semiconductor (CMOS) became the standard for digital IC design. This process did
not necessarily require the same voltage levels as TTL circuits， but the industry
adopted the 5V TTL standard logic threshold levels to maintain backward
compatibility with older systems (Reference 1).
The current revolution in supply voltage reduction has been driven by demand for
faster and smaller products at lower costs. This push has caused silicon geometries
to drop from 2µm in the early 1980s to 0.25µm that is used in todays latest
microprocessor and IC designs. As feature sizes have become increasingly smaller，
the voltage for optimum device performance has also dropped below the 5V level.
This is illustrated in the current microprocessors for PCs， where the optimum core
operating voltage is programmed externally using voltage identification (VID) pins，
and can be as low as 1.3V.
The strong interest in lower voltage DSPs is clearly visible in the shifting sales
percentages for 5V and 3.3V parts. Sales growth for 3.3V DSPs has increased at
more than twice the rate of the rest of the DSP market (30% for all DSPs versus
more than 70% for 3.3V devices). This trend will continue as the high volume/high
growth portable markets demand signal processors that contain all of the traits of
the lower voltage DSPs.
On the one hand， the lower voltage ICs operate at lower power， allow smaller chip
areas， and higher speeds. On the other hand， the lower voltage ICs must often
interface to other ICs which operate at larger VDDsupply voltages thereby causing
interface compatibility problems. Although lower operating voltages mean smaller
signal swings， and hence less switching noise， noise margins are lower for low
supply voltage ICs.